Layout/Mask Designer

Role and Responsibilities Analog Layout Design and develop critical analog, mixed-signal, and custom digital blocks. Perform comprehensive layout verification, including LVS, DRC, Antenna, PEX, Voltus, EMIR, and ensure quality checks and documentation support. Deliver block-level layouts on time with high-quality standards. Provide leadership in area estimation and execution to meet project schedules. Collaborate effectively with team members and demonstrate strong teamwork skills. Communicate proactively with local engineering teams to ensure project success. Qualifications / Requirements Experience: 5–8 years in analog/custom layout design across advanced CMOS processes and technology nodes (5nm to 130nm). Tool Expertise: Proficiency in Cadence MXL / EXL / GXL / XL, Voltus, Quantus; Mentor Graphics Calibre (DRC/LVS/xACT); Synopsys Star RC / R3D. Layout Skills: Hands-on experience in designing critical blocks such as LDOs, Bandgap references, oscillators, and reference generators. Technical Knowledge: Strong understanding of analog layout fundamentals, including matching, electromigration, latch-up, coupling, crosstalk, IR-drop, and parasitic effects. Circuit Impact Awareness: Ability to assess layout effects on high-speed performance, capacitance, power, and area. Design Quality: Skilled in interpreting design constraints and implementing robust, high-quality layouts. Problem-Solving: Excellent analytical skills for physical verification and debugging of custom layouts. Mindset: Passion for continuous learning, innovation, and collaborative success. Education BE or MTech in Electronics / VLSI Engineering (Exceptional diploma holders in Electronics or VLSI Engineering can also be considered.)

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