Post silicon Validation

Role: Post Silicon Validation Engineer(RTL Design, FPGA Design)Experience: 5 – 8 yearsLocation: Hyderabad, On-siteNotice Period: Immediate JoinersResponsibilities:· FPGA Design Flow & Validation· RTL Design, Implementation, and Protocols (PCIe, Ethernet, DDR4/5, Memory)· Integration-focused role: 80% Integration, 20% Design· System-level Testing & Design· Silicon Validation· Debugging Interfaces and Design-level Debugging· Board-level DebuggingRequirements:· Strong knowledge in RTL design and implementation· Expertise in FPGA design flow and validation· Experience with system-level testing and silicon validation· Hands-on exposure to debugging (board level & design level)· Familiarity with Xilinx / Intel toolchains· Understanding of protocols: PCIe, Ethernet, DDR4/5, MemoryPlease share your Relevant profiles or refer your friends or colleagues to jhansi.bv@ for further discussion.

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