STA Engineer

Job Title: STA EngineerExperience: 6–12 YearsLocation: Bangalore / HyderabadNotice Period - Immediate Joiners PreferedJob DescriptionWe are seeking a skilled STA Engineer with 6–12 years of experience in Static Timing Analysis and timing closure for complex ASIC designs. The ideal candidate will have strong expertise in constraint development, multi-mode multi-corner (MMMC) analysis, and timing sign-off methodologies.You will play a critical role in ensuring design performance and reliability by driving timing closure across all scenarios.Key ResponsibilitiesLead static timing analysis (STA) across multiple modes, corners, and scenarios (MMMC)Develop, validate, and manage timing constraints (SDC)Drive timing closure and debug setup/hold violations across the design cyclePerform detailed timing analysis and generate sign-off quality reportsCollaborate with synthesis, physical design, and RTL teams to resolve timing issuesOptimize design for performance, power, and area (PPA)Support timing sign-off and ensure design meets all timing requirementsRequired Skills6–12 years of experience in Static Timing AnalysisStrong understanding of timing concepts, constraints development, and timing closureHands-on experience with STA tools such as PrimeTime, Tempus, or equivalentExpertise in multi-mode multi-corner (MMMC) analysisSolid understanding of ASIC design flow and timing methodologiesExperience in debugging timing violations and improving timing QoRFamiliarity with clock tree concepts, false paths, and multi-cycle paths.

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