Hi all job seekers,Modernize chip solutions is hiring for the below requirement.Role: RTL Design EngineerExp: 5-7 yrsLocation: BengaluruNotice Period: Immediate to 30 daysSkills: Digital Design & SoC IntegrationRTL (Verilog/SystemVerilog)AMD/Xilinx flow (preferred)Multi-clock & power domainsDebug (Verdi), CDC/RDC/LintManual ECOsRole: RTL Design EngineerExp: 5-7 yrsLocation: BengaluruNotice Period: Immediate Skills: Server SoC RTL modifications (IP removal/model reduction)Testbench updates & validationUnderstand & implement from HAS/MAS specsLimited RTL reuse; independent contributorIf Interested please share your profile to my mail id