Hiring: Analog Layout EngineerExperience: 4+ YearsKey Responsibilities:- Should have hands-on experience with TSMC 3nm and below nodes - Well-versed with Cadence's latest GXL and VSR router - Well-versed with Calibre PV on lower technologies - Excellent layout skills, such as device matching, routing matching - Ability to design hierarchical layoutsNotice Period: 0 – 30 days OnlyLocation: HyderabadInterested candidates can reach out or share their profiles.Krithika Mkrithikamusale@