Senior Design Verification Engineer

Title : Technical Lead/Manager - Verification reach me at sruthipaleti@ Job Role: - To play a key role in leading the verification strategy, planning, execution, and delivery of verification projects, ensuring they are completed on time and to the highest quality standards. - Lead and inspire a team of verification engineers, fostering a culture of innovation, collaboration, and continuous improvement. - Provide technical guidance and mentorship to the verification team, ensuring they are up-to-date with the latest verification methodologies, tools, and best practices. - Ensure the team is adequately resourced and equipped to meet current project demand. - Act as the primary point of contact for client regarding understanding project needs and ensuring their expectations are met or exceeded. - This role requires deep technical expertise, leadership skills, and a passion for solving challenging verification problems. Job Qualification - Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or related field. - 15+ years of experience in IP/SoC/Sub-System verification with a strong track record of successful project delivery. - Expertise in verification methodologies (UVM, OVM, etc.) and languages (System Verilog, Verilog, etc.). - Strong understanding of SoC architecture and interconnects. - Exposure to high-speed interfaces (PCIe, CXL, UCIE, Ethernet, DDR, ) and protocols. - Excellent problem-solving skills with the ability to debug complex issues and drive solutions. - Proven leadership skills with experience mentoring and guiding verification teams. - Strong communication and collaboration skills, with the ability to work effectively across diverse teams. - Familiarity with scripting languages (Python, Perl, TCL) for automation of verification tasks If interested share your updated resume to sruthipaleti@ or reach me at 7981496926

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