SoC verification Lead/ Staff engineer

Eteros Technologies is looking for experienced ASIC Verification Design Engineers to join our team Looking only for Immediate joiners. We are seeking individuals with 5 to 15 years of experience to be a part of our projects, working on innovative cutting-edge technologies.Work Location: Bangalore/ Hyderabad/ Ahmedabad Experience from5 yrs to 15 years in SoC level Verification Looking only for Immediate joiners. Proficiency in System Verilog and UVM Exposure to verifying DSP based SoC designs(with Smart Cache/TCM and Familiar with Multiply and accumulate unit ( MAC) Experience with SoC memory sub-system, LPDDR. Writing C code and working on System Verilog-C (SV-C) testbenches. Must be familiar with ARM/RISC-V subsystems. Familiar with one or more protocols like AMBA protocols, JTAG, SPI, Ethernet, UCIE etcEteros Technologies, Inc. is a Semiconductor Engineering services startup, Founded in 2020 in Silicon Valley and led by professionals with over 150 years of combined semiconductor design experience, the Eteros team has numerous successful tape outs under its belt and a global presence of customers spanning the US, Europe and APAC. We work on cutting edge technology nodes while working on the state-of-the art designs in the AI/ML, Datacenter, Automotive and 5G domains. Kindly visit (for more details.

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