Physical Design Lead

Key skills with hand on: Physical design Engineer, floor planning, Routing, Placement ,CTS, Synthesis ,Timing analysis/Timing Closure,Fullchip,Netlist2GDSII, ICC ,Fusion Compiler, ICV, Calibre ,ICC2, Primetime,PT-Px Experience: 5 - 25 years Work Location: Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education: Engineering (excluding Mechanical/Civil) Detailed JD: • In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. • Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. • Should have experience on programming in Tcl/Tk/Perl. • Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre). • Well versed with timing constraints, STA and timing closure. • Inspirational leadership style, good communication skills, and ability to work in a global environment In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. • Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. • Should have experience on programming in Tcl/Tk/Perl · Well versed with timing constraints, STA and timing closure.

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