Lead STA Engineer

Lead STA Engineer Location- BengaluruAbout the RoleWe are seeking a highly skilled Lead Static Timing Analysis (STA) Engineer with 6+ years of experience to join our cutting-edge silicon design team in Bengaluru. As a Lead STA Engineer, you will drive timing closure across complex, high-performance designs, collaborating with cross-functional teams to deliver world-class silicon solutions at scale.ResponsibilitiesOwn end-to-end STA flow for large-scale SoC designs, from block-level to full-chip sign-off.Develop and optimize timing constraints, methodologies, and scripts to ensure robust timing closure.Partner with RTL, synthesis, and physical design teams to identify and resolve timing bottlenecks.Perform detailed analysis of timing paths, clocking schemes, and signal integrity issues.Drive automation and scalability in STA processes to support next-generation designs.Mentor junior engineers and provide technical leadership across timing-related challenges.Collaborate with global teams to align on methodologies, best practices, and sign-off criteria.Basic QualificationsBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.6+ years of hands-on experience in STA for complex ASIC/SoC designs.Strong expertise in industry-standard STA tools (e.g., Synopsys PrimeTime, Cadence Tempus).Deep understanding of timing concepts: setup/hold, clock skew, OCV/AOCV, PVT variations, and SI effects.Proven track record of timing closure at advanced technology nodes (7nm and below preferred).Proficiency in scripting languages (Tcl, Perl, Python) for automation.Preferred QualificationsExperience with hierarchical STA methodologies and multi-mode, multi-corner analysis.Familiarity with low-power design techniques and clock-domain crossing verification.Strong problem-solving skills with ability to work in fast-paced, ambiguous environments.Excellent communication and collaboration skills to work across global teams.Why Join UsWork on industry-defining silicon projects with massive scale and impact.Collaborate with some of the brightest minds in chip design and verification.Be part of a culture that values innovation, ownership, and continuous learning.Competitive compensation, benefits, and career growth opportunities.About Us:LeadSoC Technologies offers cutting edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly over the last 9+ years to meet the evolving needs of the Semiconductor, Automotive, Telecom and Consumer Electronics segments. Our End-to-End VLSI design services span Micro Architecture to Tape Out and beyond with Post Silicon support. We have been involved in co-development of multiple SOC releases for our clients. LeadSoC has in house VLSI labs equipped with state of art tools (from leading EDA OEM’s) for grooming talent. We work on SOC’s, FPGA and ASIC platforms in areas spanning Digital Front End Design & Verification, Back End Design (RTL=> GDS), Analog & Custom Design & Verification. We also work on RF & Board Design for OEMs. Our Software practice works in areas spanning Firmware design, Hardware Abstraction, Kernel Space & User space design. We work on both bare metal and RTOS/Linux like platforms across x86, ARM, MIPS & Power PC architectures across multiple chipsets. Our presence in Concept to Manufacturing, spans across a broad spectrum of capabilities including Board Design, Platform Software solutions (Boot Loader, Bare Metal Firmware, Drivers/BSP, Abstraction layers), Middleware (Stacks, Frameworks, diagnostics), Target application, HMI (industry standard frameworks), IoT and Cloud (AWS, GCP, Azure) applications and V&V services. We have an embedded Software COE with in-house Labs, powered by open-source tool chain equipped with variety of reference boards. This environment enables our engineers to play while they learn. It also creates an environment for the engineers to ideate / create reference Solutions, POC designs. Our teams have been involved in providing frameworks for On-board Diagnostics, Manufacturing diagnostics, Post & Pre-Silicon Validation and Performance Optimization for products based on Linux / RTOS platforms. We have also worked on migrating stacks from legacy to NextGen platforms.Websitehttp:

Apply Now