Full Chip Physical Design Lead

Full Chip PD Lead (8+ Years Experience) Locations:Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, PuneJob Description: We are seeking a highly experiencedFull Chip PD Leadto drive top-level physical design activities for complex, high-performance SoCs. The ideal candidate will have hands-on expertise in database integration, physical verification, and leading mid-sized engineering teams. Key Responsibilities: Leadtop-level database integrationand manage incremental updates for derivative chips, includingincremental pin alignment and routing Ownblock integration , includinganalog IP integration , and ensure clean Physical Verification (PV) sign-off Drive automation and improve flow efficiency usingPerl, Tcl, Awk, or Python Provide technical guidance and leadership to a team of5–8 engineers Collaborate cross-functionally to ensure consistency between block-level and top-level deliveries Requirements: 8+ years of experience inFull Chip Physical Design Proven experience working on chips withGHz-range clocksandmulti-million instance complexity Hands-on experience designing advanced SoCs in7nm and below technology nodes Strong communication skills and ability to lead and mentor engineering teamsIf you’re passionate about driving full-chip PD execution for advanced nodes and leading high-impact teams, we’d love to connect.

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