Digital Chip Design Intern (Volunteer – Master’s / PhD Students)

About Fermions ASI Fermions ASI is a deep-tech startup developing advanced AI System for digital semiconductor design. We are looking for graduate students interested in hands-on RTL design experience while contributing to engineering workflows that combine digital chip design with AI-assisted methods. For candidates who demonstrate exceptional technical contribution, ownership, and long-term interest in entrepreneurship, there may be an opportunity to discuss future roles with Fermions ASI. In select cases, outstanding contributors may be considered for deeper involvement with the founding team, which could include full-time roles and potential equity-based positions. Role Overview We are seeking Master’s or PhD students in Electrical Engineering, Computer Engineering, VLSI, or related fields to work on RTL design and validation tasks. The intern will design digital modules, perform verification, and evaluate RTL implementations. The role also includes working on workflows that integrate AI-assisted approaches into digital chip design. This position involves hands-on RTL development and technical validation work. Key Responsibilities - Design synthesizable RTL modules using Verilog or SystemVerilog - Translate functional specifications into structured RTL implementations - Develop simulation testbenches and verify functionality - Debug designs using waveform analysis tools - Analyze design trade-offs such as latency, area, and performance - Evaluate AI-generated RTL outputs and provide technical feedback - Document results and report findings Required Qualifications - Currently enrolled in a Master’s or PhD program in Electrical Engineering, Computer Engineering, Microelectronics, or related field - Strong understanding of Digital Logic Design and Computer Architecture - Hands-on experience writing Verilog or SystemVerilog RTL - Experience with simulation tools such as ModelSim, Questa, Vivado Simulator, or similar - Ability to debug RTL using waveform analysis Preferred Qualifications - Experience with FPGA implementation - Exposure to synthesis and timing analysis - Familiarity with verification methodologies - Experience with scripting (Python, TCL, or similar) - Interest in AI applications in semiconductor design What You Will Gain - Practical experience in RTL development and verification - Exposure to modern digital design workflows - Opportunity to contribute to AI-assisted chip design methodologies - Collaboration with experienced semiconductor engineers Compensation This is a paid internship position. Compensation will be aligned with the candidate’s experience, skills, and level of contribution. In addition to monetary compensation, interns will gain hands-on experience working on real-world digital chip design problems and AI-assisted workflows. Exceptional contributors demonstrating strong technical impact, ownership, and long-term alignment may be considered for future full-time roles or equity-based opportunities within Fermions ASI. How to Apply You can apply via or send your resume to Please include a brief description of one RTL design project you have completed and the tools used.

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